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tb62709ng/fg 2006-06-14 1 toshiba bi ? cmos integrated circuit silicon monolithic tb62709ng,TB62709FG 7 ? segment drivers with built ? in decoders (common anode capability, maximum 4 ? digit control) the tb62709ng and TB62709FG are multifunctional, compact, 7 ? segment led display drivers. these ics can directly drive 7 ? segment displays and individual leds, and can control either a 4 ? digit display with decimal points, or 32 individual leds. these ics can also be used with common ? anode displays. their outputs are constant current, the ampere levels at which are set using an external resistor. a synchronous serial port connects the ic to the cpu. the different modes of control provided by this device including duty control register set, digit set, decode set and standby set, are all based on every 16 ? bit of serial data. the suffix (g) appended to the part number represents a lead(pb)-free product. features control circuit power supply : v dd = 4.5 to 5.5 v digit output rating : 17 v / ? 400 ma decoder output rating : 17 v / 50 ma built ? in decoder : decodes the numerals 0 to 9, certain alphabetic characters, and of course blanks code. digit control function : can scan digit outputs dig ? 0 to dig ? 3 when connected to the common anode pins of a 7 ? segment display. maximum transmission frequency : f clk = 15 mhz decoder outputs (out ? a to out ? dp) output current can be set up to a 40ma maximum using an external resistor. constant current tolerance (ta = 25c, v dd = 5.0 v) : variation between bits = 7%, variation between devices (including variation between bits) = 15% at v ce 0.7 v package : 24 ? pin sdip (sdip24 ? p ? 300 ? 1.78) 24 ? pin ssop (ssop24 ? p ? 300 ? 1.00) tb62709ng TB62709FG weight sdip24-p-300-1.78 : 1.62 g (typ.) ssop24-p-300-1.00 : 0.32 g (typ.)
tb62709ng/fg 2006-06-14 2 pin assignment (top view) block diagram
tb62709ng/fg 2006-06-14 3 pin functions pin number pin name function 1 v dd 5 v power pin. 2 data ? in (di) serial data input pin. 3 clock (ck) clock input pin. the shift register shifts data on the clock's rising edge. 4 load (ld) load signal input pin. the data in the d 8 to d 15 are read on the rising edge and the current load register the is selected from among the duty register, the decode & digit register, or data registers 0 to 3. the d 0 to d 7 bits of the 16 ? bit shift register contain data corresponding to the same registers just described, which are read on the load signal's falling edge. 5~12 out ? a to out ? dp segment drive output pins. the a to dp outputs correspond to the seven segments. these pins output constant sink current. connect each of these pins to the corresponding led's cathode. 13, 21 p ? gnd ground pins, there are two which can be used to ground the output out ? a to out ? dp pins. 14 test ? in2 product test pin. in normal use, be sure to connect to ground. 15 test ? in1 product test pin. in normal use, be sure to connect to ground. 16, 17, 19, 20 dig ? 0 to dig ? 3 digit output pins. each of these pins can control one of the four seven ? segment digits in a display. these pins output the v cc pin voltage as a source current output. connect these pins to the led anodes. 18 v cc power pin for digit output. 22 r ? ext current setting pin for the out ? a to out ? dp pins. connect a resistor between this pin and ground when setting the current. 23 data ? out (do) serial data output pin. use when tb62709ng or TB62709FG devices are used in cascade connections. 24 l ? gnd ground pin for logic and analog circuits.
tb62709ng/fg 2006-06-14 4 timing diagram data input transfer data to the data ? in pin on every 16 ? bit combining address (8bits) and data (8bits). after the 16 th clock signal input following this data transfer input a load signal from the ld pin. input the load signal using an active high pulse. the register address is set on the rising edge of the load pulse. on the subsequent falling edge, the data are read as data of the mode of the register.
tb62709ng/fg 2006-06-14 5 description of operation data input (data ? in, clock, load) the data are input serially using the data ? in pin. the data input interface consists of a total of three inputs : data ? in, load, and clock. binary code stored in the 16 ? bit shift register offers control modes including duty control register set, digitset, decode set, and standby set, the data are shifted on the rising edge of the clock, starting from the msb. cascade ? connecting tb62709ng or TB62709FG devices provides capability for controlling a larger number of digits. the serial data in the 16 ? bit shift register are used as follows : the four bits d 15 (msb) to d 12 select the ic operating mode (table 1), while d11 to d 8 select the register corresponding to the operating mode (table 2). bits d 7 to d 0 (lsb) of the 16 ? bit shift register are used for detail settings, such as number of digits in use, character settings in each digit, and light intensity. the internal registers are loaded on the rising edge of the load signal, which causes loading of data from an external source into the d 15 (msb) to d8 bits of the shift register, operating mode and the corresponding register selection data. on the subsequent falling edge, the detail setting data of d 7 to d0 (lsb) are loaded. normally load is low. after a serial transfer of 16bits, the input of a high ? level pulse loads the data. note the following caution : use the d 15 to d 8 setting and the d 7 to d 0 detail data setting as a pair. if only the d 7 to d 0 data are input without setting d 15 to d 8 an error condition may result, in which the device will not operate normally. if the current mode is set again by a new signal, the data for d 15 to d 8 must also be re ? input. operating precautions at power ? on or after operation in clear mode (in initial state), set the ic to normal mode again. otherwise, the ic will not drive the led. operating the ic in blank mode (all lights off) or in all on mode (all lights lit) does not affect the internal data. setting the ic to normal mode again continues the led lighting in the state governed by the settings made immediately before mode change. normal mode (not shut down, clear, blank, or all on mode) continues the operations set in load register mode. in normal mode, operations are governed by any new settings made in the load register, as soon as the changed setting values are loaded.
tb62709ng/fg 2006-06-14 6 operating modes (table 1.) these ics support the following five operating modes : 1. blank : forcibly turns off the constant ? current output both for data and for digit setting. this mode is not affected by the values in bits d 11 to d 0 . 2. normal operate : used for display operations after the settings of the digits are complete. note that setting this mode without making any other settings will cause display of the numeral 0. 3. load register : used for the detail settings of the duty control register, for setting decode / no decode, for inputting display data, and for setting the number of digits to drive. d 11 to d 0 of the shift register are used for the detail settings of the digits currently being driven (table 2). 4. all on : forcibly turns on the data ? side constant ? current output. this mode is not affected by d 11 to d 0 . the initial setting is four digits. when the digits must be changed, use load register mode to set the number of digits to drive. 5. standby : used to set standby state (in which internal data are not cleared) and to clear data (initialization). the settings in d 3 to d 0 of the shift register determine the choice between standby state or initialization. table 1 operating mode settings register data d 15 d 14 d 13 d 12 d 11 ~d 8 d 7 ~d 4 d 3 ~d 0 hex code initial setting blank (out ? n & dig ? 0~3 all ? off) 0 0 0 0 D D D 0 ??? h normal (operation) 0 0 0 1 D D D 1 ??? h load register (duty, decode, digit & data) 0 0 1 0 x x x 2xxxh all on (outn all ? on) 0 0 1 1 D D D 3 ??? h stand ? by 0 1 0 0 D D x 4 ?? xh x = input h or l. " ? " = are not affected by the truth table.
tb62709ng/fg 2006-06-14 7 load register selection modes (table 2) these modes select the register to provide the data to control the ic operation. the load register selection mode is determined by the settings of d 15 to d 12 and d 11 to d 8 of the shift register. 1. duty register : the data in d 7 to d 0 of this register set the digit output duty cycle. duty settings can be made in 16 steps from 0 / 16 to 15 / 16. (see table 3) 2. decode & digit register : sets decode / no decode and the number of digits to drive. decode can be set using d 7 to d 4 . the number of digits driven can be set using d 3 to d 0 . decode / no decode and the number of digits driven are set simultaneously. 3. data registers 0 to 3 : set the display data corresponding to dig0 to dig3 respectively. d 7 to d 0 of the shift register are used to set the display data. table 2 load register selection register data d 15 ~d 12 d 11 d 10 d 9 d 8 d 7 ~d 4 d 3 ~d 0 hex code load duty register 2h 0 0 0 0 x x 20xxh load decode & digit register 2h 0 0 0 1 x x 21xxh load data register 0 2h 0 0 1 0 x x 22xxh load data register 1 2h 0 0 1 1 x x 23xxh load data register 2 2h 0 1 0 0 x x 24xxh load data register 3 2h 0 1 0 1 x x 25xxh x = input h or l.
tb62709ng/fg 2006-06-14 8 duty control register settings duty control register detail settings and operation (table 3) writing 20h to d 15 ~d 8 and writing 0~fh to d 3 ~d 0 sets the duty cycle shown in the following table for the digit ? side source driver output. the duty cycle can be set in 16 steps. the initial setting is 15 / 16. after data clear, the setting is also 15 / 16. the current settings continue until changed (by reset execution, or to the initial state, data clear state, or standby state). table 3 duty control register settings register data duty cycle d 15 ~d 8 d 7 ~d 4 d 3 d 2 d 1 d 0 hex code initial setting 0 / 16 20h D 0 0 0 0 20x0h 1 / 16 20h D 0 0 0 1 20x1h 2 / 16 20h D 0 0 1 0 20x2h 3 / 16 20h D 0 0 1 1 20x3h 4 / 16 20h D 0 1 0 0 20x4h 5 / 16 20h D 0 1 0 1 20x5h 6 / 16 20h D 0 1 1 0 20x6h 7 / 16 20h D 0 1 1 1 20x7h 8 / 16 20h D 1 0 0 0 20x8h 9 / 16 20h D 1 0 0 1 20x9h 10 / 16 20h D 1 0 1 0 20xah 11 / 16 20h D 1 0 1 1 20xbh 12 / 16 20h D 1 1 0 0 20xch 13 / 16 20h D 1 1 0 1 20xdh 14 / 16 20h D 1 1 1 0 20xeh 15 / 16 20h D 1 1 1 1 20xfh x = input h or l. " ? " = are not affected by the truth table.
tb62709ng/fg 2006-06-14 9 digit settings setting the number of digits (table 4) writing 21h to d 15 ~d 8 and at the same step writing 0h~3h to d 3 ~d 0 sets the number of digits to a maximum of four the display. the initial setting is four digits, and four will also be set by a data clear. the current settings continue until changed (by reset execution, or to the initial state, data clear state, or standby state). when changing the number of digits, also set d 7 to d 4 . table 4 digit settings register data d 15 ~d 8 d 7 ~d 4 d 3 d 2 d 1 d 0 hex code initial setting activated dig ?? 0 only 21h x 0 0 0 0 21x0h activated dig ?? 0~1 21h x 0 0 0 1 21x1h activated dig ?? 0~2 21h x 0 0 1 0 21x2h activated dig ?? 0~3 21h x 0 0 1 1 21x3h x = input h or l. decode settings decode settings (table 5) the settings for decode are the same as the settings for the number of digits, described under setting, above. writing 21h to d 15 ~d 8 and writing 0~1h to d 7 ~d 4 set decode mode. when using this ic for controlling the lighting on individual leds used for a dot matrix rather than a 7 ? segment display, set to no decode. as table 6 shows, d 0 in the data register is used to turn out ? a on and off ; d 1 turns out ? b on and off. the initial setting is decode mode, and decode mode will also be set by a data clear. the current settings continue until changed (by reset execution, or to the initial state, data clear state, or standby state). since d 3 to d 0 are also used for setting the number of digits, when changing the decode setting, also set d 3 to d 0 . table 5 decode settings register data d 15 ~d 8 d 7 d 6 d 5 d 4 d 3 ~d 0 hex code initial setting pass decoder (no decode) 21h 0 0 0 0 x 210xh decode 21h 0 0 0 1 x 211xh x = input h or l.
tb62709ng/fg 2006-06-14 10 the following table shows the correspondence between the serial data and the output pins when no decode is set table 6 correspondence between serial data and output pins in no decode mode register data output initial state note d 0 out ? a l d 1 out ? b l d 2 out ? c l d 3 out ? d l d 4 out ? e l d 5 out ? f l d 6 out ? g l d 7 out ? dp l output is on when data = h and off when data = l. standby settings standby mode settings and operation (table 7) writing 4h to d 15 ~d 12 and writing 0h to d 3 ~d 0 sets standby mode. writing 4h to d 15 ~d 12 and writing 1h to d 3 ~d 0 sets all data clear mode. standby mode maintains the settings made immediately before this mode came in force, turns the output current off, and controls the bias current flowing in the internal circuits. all data clear resets all settings to their initial states. table 7 standby settings register data d 15 ~d 8 d 7 ~d 4 d 3 d 2 d 1 d 0 hex code standby (no data clear) 4 ? h D 0 0 0 0 4xx0h all data clear 4 ? h D 0 0 0 1 4xx1h x = input h or l. " ? " are not affected by the truth table.
tb62709ng/fg 2006-06-14 11 list of character generator decoding data character generator decoding (table 8) as the following table shows, the characters are decoded using combinations of the data in d 0 to d 3 and d 5 to d 4 . in decoding, d 6 is used exclusively for setting decimal points. spaces where (d 0 , d 1 , d 2 , d 3 ) = (0000) and (d 5 , d 4 ) = (01) are regarded as blank. table 8 list of character generator decoding data d 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 d 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 d 2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 d 3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 d 5 d 4 hex 0 1 2 3 4 5 6 7 8 9 a b c d e f 0 0 0 0 1 1 d 7 d 6 x 0 dp off x 1 dp on
tb62709ng/fg 2006-06-14 12 data input (example 1: displays and blinks characters a, b, c and d in digits 0, 1, 2 and 3 respectively. period after "d" part of it, or a sentence ? end marker? ) step d15~ d12 d11~ d8 d7~ d4 d3~ d0 dig ? 0~3 seg ? a, b, c, d, e, f, g seg ? dp mode display indicate 0 D D D D off off off at power ? on ( = clear mode) all blank 1 0010 0000 xxxx 1111 off off off duty = 15 / 16 all blank 2 0010 0001 0001 0011 off off off decode, 4dig all blank 3 0010 0010 x000 1010 off off off dig ? 0 = a all blank 4 0010 0011 x000 1011 off off off dig ? 1 = b all blank 5 0010 0100 x000 1100 off off off dig ? 2 = c all blank 6 0010 0101 x000 1101 off off off dig ? 3 = d all blank 7 0001 xxxx xxxx xxxx on on off normal a ? b ? c ? d 8 0010 0000 xxxx 1000 on on off duty = 8 / 16 a ? b ? c ? d 9 0000 xxxx xxxx xxxx off off off blank all blank 10 0001 xxxx xxxx xxxx on on off normal a ? b ? c ? d 11 0000 xxxx xxxx xxxx off off off blank all blank 12 0001 xxxx xxxx xxxx on on off normal a ? b ? c ? d 13 0000 xxxx xxxx xxxx off off off blank all blank 14 0001 xxxx xxxx xxxx on on off normal a ? b ? c ? d 15 0100 xxxx xxxx 0000 off off off stand ? by (shut down) all blank data input (example 2: scroll ? lights digits 0, 1, 2, 3 = a., ? b., ? c., ? d. ?seq; and please explain the data on rhs? digit by digit (with decimal points)) step d15~ d12 d11~d 8 d7~ d4 d3~ d0 dig ? 0~3 seg ? a, b, c, d, e, f, g seg ? dp mode display indicate 0 D D D D off off off at power ? on ( = clear mode) all blank 1 0010 0000 xxxx 1111 off off off duty = 15 / 16 all blank 2 0010 0001 0001 0011 off off off decode, 4dig all blank 3 0010 0010 x100 1010 off off off dig ? 0 = a. all blank 4 0010 0011 x001 0000 off off off dig ? 1 = blank all blank 5 0010 0100 x001 0000 off off off dig ? 2 = blank all blank 6 0010 0101 x001 0000 off off off dig ? 3 = blank all blank 7 0001 xxxx xxxx xxxx on on on normal a. ??? 8 0010 0010 x001 0000 off on off dig ? 0 = blank all blank 9 0010 0011 x100 1011 on on on dig ? 1 = b. ? b. ?? 10 0010 0011 x001 0000 off on off dig ? 1 = blank all blank 11 0010 0100 x100 1100 on on on dig ? 2 = c. ?? c. ? 12 0010 0100 x001 0000 off on off dig ? 2 = blank all blank 13 0010 0101 x100 1101 on on on dig ? 3 = d. ??? d. 14 0100 xxxx xxxx 0000 off off off stand ? by (shut down) all blank
tb62709ng/fg 2006-06-14 13 state transition diagram
tb62709ng/fg 2006-06-14 14 absolute maximum ratings (ta = 25c) characteristic symbol rating unit supply voltage for logic circuits v dd 7.0 v supply voltage v cc 17 v dig ? 0 to dig ? 3 output current i dig ? 400 ma out ? a to dp output current i out 50 ma output current for logic block i oh / i ol 5 ma input voltage v in ? 0.3~vdd + 0.3 v operating frequency f ck 15.0 mhz total supply current i vdd 400 ma tb62709ng 1.78 power dissipation TB62709FG p d 0.62 w operating temperature t opr ? 40~85 c storage temperature t stg ? 55~150 c electrical characteristics (unless otherwise stated, v dd = 5.0 v, v cc = 5.0 v, r ext = 760 ? , ta = ? 40~85c) characteristic symbol test cir ? cuit test condition min typ. max unit i cc1 1 set normal ope. mode, rext = 760 ? @out ? a~dp all on, ta = 25c D 300 D operating power supply current for output block i cc2 1 set normal ope. mode, rext = 760 ? @out ? a~dp all on v cc = 12 v, ta = 25c D 320 D ma dig ? 0 to dig ? 3 scan frequency f osc 2 normal ope. mode, v dd = 4.5~5.5 v 240 480 960 hz out ? a to dp output sink current i seg 3 normal ope. mode, v ce = 0.7 v, r ext = 760 ? 29 34 40 ma dig ? 0 to 3 output leakage current i leak1 4 all off mode, v cc = 17 v D D ? 20 a out ? a to dp output leakage current i leak2 4 all off mode, v cc = 17 v D D 20 a dig ? 0 to 3 output voltage v out 5 normal ope. mode, i dig = ? 320 ma 3.0 D D v
tb62709ng/fg 2006-06-14 15 logic block characteristic symbol test cir ? cuit test condition min typ. max unit i dd1 6 standby mode, ta = 25c D D 200 a static power supply current for logic circuits i dd2 6 blank mode, ta = 25c D D 12.5 ma operating power supply current for logic circuits i dd3 6 normal ope. mode, f clk = 10mhz, data ? in : out ? a~dp = on, ta = 25c D D 20.5 ma high input current for logic circuits i ih D data ? in, load & clock : v in = 5 v D D 1 a low input current for logic circuits i il D data ? in, load & clock : v in = 0 v D D ? 1 a v oh1 6 data ? out, i oh = ? 1.0 ma 4.6 D D high output voltage for logic circuits v oh2 6 data ? out, i oh = ? 1.0 a D v dd D v v ol1 6 data ? out, i ol = 1.0 ma D D 0.4 low output voltage for logic circuits v ol2 6 data ? out, i oh = 1.0 a D 0.1 D v clock frequency f clk 6 cascade connected, ta = ? 40~85c 10 D D mhz
tb62709ng/fg 2006-06-14 16 switching characteristics (unless otherwise stated, v dd = 5.0 v, v cc = 5.0 v, ta = 25c) characteristic symbol test cir ? cuit test condition min typ. max unit data hold time (d ? in ? clock) t dho D D D 10 D ns data setup time (d ? in ? clock) t dst D D D 20 D ns t phl ? so c l = 10 pf D 25 D serial output delay time (clock ? d ? out) t plh ? so D c l = 10 pf D 25 D ns high clock pulse width t ckh D D D 30 D ns low clock pulse width t ckl D D D 30 D ns load pulse width t wld D D D 100 D ns load clock time (clock ? load) t clk ? ld D D D 50 D ns clock load time (load ? clock) t ld ? clk D D D 50 D ns t phl ? seg c l = 10 pf D D 5.0 out ? a to dp output delay time (load ? outn) t plh ? seg D c l = 10 pf D D 5.0 s out ? a to dp output rise time (outn) t r seg D c l = 10 pf 0.2 1.0 D s out ? a to dp output fall time (outn) t f seg D c l = 10 pf 0.2 1.0 D s t phl ? dig c l = 10 pf D D 10.0 dig ? 0~dig ? 3 output delay time (load ? dign) t plh ? dig D c l = 10 pf D D 10.0 s dig ? 0~dig ? 3 output rise time (dign) t r dig D c l = 10 pf 0.4 2.0 D s dig ? 0~dig ? 3 output fall time (dign) t f dig c l = 10 pf 0.4 2.0 D s
tb62709ng/fg 2006-06-14 17 recommended operating conditions (unless otherwise stated, v dd = 5.0 v, v cc = 5.0 v, ta = ? 40~85c) characteristic symbol test cir ? cuit test condition min typ. max unit supply voltage for output block v cc D D 4.0 D 6.0 v dig ? 0 to dig ? 3 output source current i dig D v out = 3.0 v D D ? 320 ma out ? a to out ? dp output sink current i seg D v ce = 0.7 v D D 40 ma logic block characteristic symbol test cir ? cuit test condition min typ. max unit supply voltage for logic block v dd D D 4.5 D 5.5 v high input current for logic circuits i ih D data ? in, load & clock, v in = v dd D D 1 a low input current for logic circuits i il D data ? in, load & clock, v in = 0v D D ? 1 a high input voltage for logic circuits v ih D D 0.7 v dd D D v low input voltage for logic circuits v il D D D D 0.3 v dd v switching conditions characteristic symbol test cir ? cuit test condition min typ. max unit data hold time (d ? in ? clock) t dho D D 30 D D ns data setup time (d ? in ? clock) t dst D D 50 D D ns serial output delay time (clock ? d ? out) t pdso D c l = 10 pf 50 D D ns high clock pulse width t ckh D D 30 D D ns low clock pulse width t ckl D D 30 D D ns load pulse width t wld D D 150 D D ns load clock time (clock ? load) t clkld D D 100 D D ns clock load time (load ? clock) t ldclk D D 100 D D ns
tb62709ng/fg 2006-06-14 18 test circuits (1) i cc1 , i cc2 (2) f osc
tb62709ng/fg 2006-06-14 19 (3) i seg (4) i leak1 , i leak2
tb62709ng/fg 2006-06-14 20 (5) v out (6) i dd1 , i dd2 , i dd3 , v oh1 , v oh2 , v ol1 , v ol2 , f clk
tb62709ng/fg 2006-06-14 21 duty cycle settings and output current values
tb62709ng/fg 2006-06-14 22 external resistance and output current values the following diagram shows application circuits. because operation may be unstable due to influences such as the electromagnetic induction of the wiring, the ic should be located as close as possible to the led. the l ? gnd and p ? gnd of the ic are connected to the substrate in the ic. take care to avoid a potential difference exceeding 0.4v at two pins. when executing the pattern layout, toshiba recommends not including inductance components in the gnd or output pin lines, and not inserting capacitance components exceeding 50pf between the r ext and gnd.
tb62709ng/fg 2006-06-14 23 application circuit example (connection example) precautions for using utmost care is necessary in the design of the output line, v cc (v dd ) and (l ? gnd, p ? gnd) line since ic may be destroyed due to short ? circuit between outputs, air contamination fault, or fault by improper grounding.
tb62709ng/fg 2006-06-14 24 package dimensions weight: 1.62 g (typ.)
tb62709ng/fg 2006-06-14 25 package dimensions weight: 0.32 g (typ.)
tb62709ng/fg 2006-06-14 26 notes on contents 1. block diagrams some of the functional blocks, circuits, or constants in the block diagram may be omitted or simplified for explanatory purposes. 2. equivalent circuits the equivalent circuit diagrams may be simplified or some parts of them may be omitted for explanatory purposes. 3. timing charts timing charts may be simplified for explanatory purposes. 4. application circuits the application circuits shown in this document are provided for reference purposes only. thorough evaluation is required, especially at the mass production design stage. toshiba does not grant any license to any industrial property rights by providing these examples of application circuits. 5. test circuits components in the test circuits are used only to obtain and confirm the device characteristics. these components and circuits are not guaranteed to prevent malfunction or failure from occurring in the application equipment. ic usage considerations notes on handling of ics (1) the absolute maximum ratings of a semiconductor device are a set of ratings that must not be exceeded, even for a moment. do not exceed any of these ratings. exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. (2) use an appropriate power supply fuse to ensure that a large current does not continuously flow in case of over current and/or ic failure. the ic will fully break down when used under conditions that exceed its absolute maximum ratings, when the wiring is routed improperly or when an abnormal pulse noise occurs from the wiring or load, causing a large current to continuously flow and the breakdown can lead smoke or ignition. to minimize the effects of the flow of a large current in case of breakdown, appropriate settings, such as fuse capacity, fusing time and insertion circuit location, are required. (3) if your design includes an inductive load such as a motor coil, incorporate a protection circuit into the design to prevent device malfunction or breakdown caused by the current resulting from the inrush current at power on or the negative current resulting from the back electromotive force at power off. ic breakdown may cause injury, smoke or ignition. use a stable power supply with ics with built-in protection functions. if the power supply is unstable, the protection function may not operate, causing ic breakdown. ic breakdown may cause injury, smoke or ignition. (4) do not insert devices in the wrong orientation or incorrectly. make sure that the positive and negative terminals of power supplies are connected properly. otherwise, the current or power consumption may exceed the absolute maximum rating, and exceeding the rating(s) may cause the device breakdown, damage or deterioration, and may result injury by explosion or combustion. in addition, do not use any device that is applied the current with inserting in the wrong orientation or incorrectly even just one time.
tb62709ng/fg 2006-06-14 27 (5) carefully select external components (such as inputs and negative feedback capacitors) and load components (such as speakers), for example, power amp and regulator. if there is a large amount of leakage current such as input or negative feedback condenser, the ic output dc voltage will increase. if this output voltage is connected to a speaker with low input withstand voltage, overcurrent or ic failure can cause smoke or ignition. (the over current can cause smoke or ignition from the ic itself.) in particular, please pay attention when using a bridge tied load (btl) connection type ic that inputs output dc voltage to a speaker directly.
tb62709ng/fg 2006-06-14 28 points to remember on handling of ics (1) heat radiation design in using an ic with large current flow such as power amp, regulator or driver, please design the device so that heat is appropriately radiated, not to exceed the specified junction temperature (tj) at any time and condition. these ics generate heat even during normal use. an inadequate ic heat radiation design can lead to decrease in ic life, deterioration of ic characteristics or ic breakdown. in addition, please design the device taking into considerate the effect of ic heat radiation with peripheral components. (2) back-emf when a motor rotates in the reverse direction, stops or slows down abruptly, a current flow back to the motor?s power supply due to the effect of back-emf. if the current sink capability of the power supply is small, the device?s motor power supply and output pins might be exposed to conditions beyond absolute maximum ratings. to avoid this problem, take the effect of back-emf into consideration in system design.
tb62709ng/fg 2006-06-14 29 about solderability, following conditions were confirmed ? solderability (1) use of sn-37pb solder bath solder bath temperature = 230c dipping time = 5 seconds the number of times = once use of r-type flux (2) use of sn-3.0ag-0.5cu solder bath solder bath temperature = 245c dipping time = 5 seconds the number of times = once use of r-type flux restrictions on product use 060116eba ? the information contained herein is subject to change without notice. 021023_d ? toshiba is continually working to improve the quality an d reliability of its products. nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. it is the responsibility of the buyer, when utiliz ing toshiba products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such toshiba products could cause loss of human life, bodily injury or damage to property. in developing your designs, please ensure that toshiba products are used within specified operating ranges as set forth in the most recent toshiba products specifications. also, please keep in mind the precautions and conditions set forth in the ?handli ng guide for semiconductor devices,? or ?toshiba semiconductor reliability handbook? etc. 021023_a ? the toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). these toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury (?unintended usage?). unintended usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc. unintended usage of toshiba products listed in this document shall be made at the customer?s own risk. 021023_b ? the products described in this document shall not be used or embedded to any downstream products of which manufacture, use and/or sale are prohibited under any applicable laws and regulations. 060106_q ? the information contained herein is presented only as a guide for the applications of our products. no responsibility is assumed by toshiba for any infringements of patents or other rights of the third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of toshiba or others. 021023_c ? the products described in this document are subject to the foreign exchange and foreign trade laws. 021023_e

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